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<<Go Back to Chip Location Reference
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L5, 74HC08 Quad 2-input AND gate |
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Pin # |
Pin Description |
Circuit Configuration |
IDM Function |
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1 |
Gate #1 input |
Driven by (L10-P8) |
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2 |
Gate #1 input |
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3 |
Gate #1 output |
Right Feeder Drive Signal |
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4 |
Gate #2 input |
Driven by (L13-P8) |
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5 |
Gate #2 input |
Driven by (L10-P4) |
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6 |
Gate #2 output |
Left Feeder Drive Signal |
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7 |
GND |
Common GND |
Power Supply GND |
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8 |
Gate #3 output |
NC |
Not used |
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9 |
Gate #3 input |
Common GND * |
Not used |
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10 |
Gate #3 input |
Common GND * |
Not used |
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11 |
Gate #4 output |
NC |
Not used |
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12 |
Gate #4 input |
Common GND * |
Not used |
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13 |
Gate #4 input |
Common GND * |
Not used |
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14 |
VCC |
Common 5VDC |
Power Supply 5VDC |
Unused inputs are generally connected to GND or 5VDC in order to prevent them from floating into an undefined logic region.