|
|
|
<<Go Back to Chip Location Reference
|
L9, 74HC08 Quad 2-input AND gate |
|||
|
Pin # |
Pin Description |
Circuit Configuration |
IDM Function |
|
1 |
Gate #1 input |
|
|
|
2 |
Gate #1 input |
|
|
|
3 |
Gate #1 output |
Drives (L10-P9) and a feeder signal transistor |
|
|
4 |
Gate #2 input |
|
|
|
5 |
Gate #2 input |
Driven by (L10-P4) |
|
|
6 |
Gate #2 output |
Drives (L13-P9) and a feeder signal transistor |
|
|
7 |
GND |
Common GND |
Power GND for device |
|
8 |
Gate #3 output |
Drives (L8-P31) |
|
|
9 |
Gate #3 input |
Driven by (L6-P3) |
|
|
10 |
Gate #3 input |
Driven by (L6-P6) |
|
|
11 |
Gate #4 output |
NC |
Not used |
|
12 |
Gate #4 input |
Hard-wired to GND |
Not used |
|
13 |
Gate #4 input |
Hard-wired to GND |
Not used |
|
14 |
VCC |
Common 5VDC |
Power 5VDC for device |