0000 ; 0000 ; M6811 Disassembler Generated Source Code 0000 ; 0000 ; For User Control File: IDM.CTL 0000 ; Program File: IDM.BIN 0000 ; Disassembly into File: IDM.DIS 0000 ; 0000 0000 0000 L0000 = 0x0000 0000 L0001 = 0x0001 0001 L0002 = 0x0002 0002 L0004 = 0x0004 0004 L0005 = 0x0005 0005 L0006 = 0x0006 0006 L0007 = 0x0007 0007 L0008 = 0x0008 0008 L0009 = 0x0009 0009 L000B = 0x000B 000B L000D = 0x000D 000D L0010 = 0x0010 0010 L0011 = 0x0011 0011 L0013 = 0x0013 0013 L0021 = 0x0021 0021 L0027 = 0x0027 0027 L0029 = 0x0029 0029 L002B = 0x002B 002B L002D = 0x002D 002D L002F = 0x002F 002F L0035 = 0x0035 0035 L00F6 = 0x00F6 00F6 L00F8 = 0x00F8 00F8 L00FA = 0x00FA 00FA L00FC = 0x00FC 00FC L00FE = 0x00FE 00FE L00FF = 0x00FF 00FF PORTA = 0x1000 1000 RESV1 = 0x1001 1001 PIOC = 0x1002 1002 PORTC = 0x1003 1003 PORTB = 0x1004 1004 PORTCL = 0x1005 1005 DDRC = 0x1007 1007 PORTD = 0x1008 1008 DDRD = 0x1009 1009 PORTE = 0x100A 100A CFORRC = 0x100B 100B OC1M = 0x100C 100C OC1D = 0x100D 100D TCNT = 0x100E 100E TIC1 = 0x1010 1010 TIC2 = 0x1012 1012 TIC3 = 0x1014 1014 TOC1 = 0x1016 1016 TOC2 = 0x1018 1018 TOC3 = 0x101A 101A TOC4 = 0x101C 101C TI4O5 = 0x101E 101E TCTL1 = 0x1020 1020 TCTL2 = 0x1021 1021 TMSK1 = 0x1022 1022 TFLG1 = 0x1023 1023 TMSK2 = 0x1024 1024 TFLG2 = 0x1025 1025 PACTL = 0x1026 1026 PACNT = 0x1027 1027 SPCR = 0x1028 1028 SPSR = 0x1029 1029 SPDR = 0x102A 102A BAUD = 0x102B 102B SCCR1 = 0x102C 102C SCCR2 = 0x102D 102D SCSR = 0x102E 102E SCDR = 0x102F 102F ADCTL = 0x1030 1030 ADR1 = 0x1031 1031 ADR2 = 0x1032 1032 ADR3 = 0x1033 1033 ADR4 = 0x1034 1034 BPROT = 0x1035 1035 RESV2 = 0x1036 1036 RESV3 = 0x1037 1037 RESV4 = 0x1038 1038 OPTION = 0x1039 1039 PPROG = 0x103B 103B HPRIO = 0x103C 103C INIT = 0x103D 103D TEST1 = 0x103E 103E CONFIG = 0x103F 103F COPRST = 0x104A 104A PPROG = 0x104B 104B LD040 = 0xD040 D040 LD629 = 0xD629 D629 LD6F9 = 0xD6F9 D6F9 COPRTN = 0xD704 D704 LD857 = 0xD857 D857 LD87F = 0xD87F D87F LD927 = 0xD927 D927 LD9A7 = 0xD9A7 D9A7 LDC71 = 0xDC71 DC71 E000 .area CODE1 (ABS) E000 .org 0xE000 ; ; ; this needs verified to be ; a function and not data ; E000 lsld E001 lsld E002 tsx E003 addd 0x00,x E005 pulx E006 pshb E007 ldab L0037 E00A tsx E00B addb 0x00,x E00D ins E00E stab L0037 E011 pulx E012 pulx E013 rts ; ; possibly a function ; to indirectly transfer ; control to eeprom ? ; E014 pshx E015 pshx E016 des E017 tsx E018 clr 0x00,x E01A ldd #0xB600 ; eeprom E01D std 0x01,x E01F LE01F: tsx E020 clr 0x04,x E022 ldx 0x01,x E024 ldab 0x00,x E026 tsx E027 stab 0x03,x E029 LE029: tsx E02A ldab 0x03,x E02C blt LE030 E02E inc 0x00,x E030 LE030: tsx E031 lsl 0x03,x E033 inc 0x04,x E035 ldab 0x04,x E037 cmpb #0x07 E039 bls LE029 E03B inc 0x02,x E03D bne LE041 E03F inc 0x01,x E041 LE041: ldd 0x01,x E043 subd #0xB606 E046 bcs LE01F E048 ldab 0x00,x E04A clra E04B pulx E04C pulx E04D ins E04E rts ; ; ; CID related ; ; address must be in a function table ; E04F pshx E050 pshx E051 pshx E052 ldd L000B E055 addd #0x0226 E058 std TOC1 E05B ldab #0x80 E05D stab TFLG1 ; clear OC1 interupt flag E060 LE060: ldab TFLG1 E063 andb #0x80 E065 bne LE06E ; wait for OC1 interupt flag E067 ldab TFLG1 E06A andb #0x02 E06C beq LE060 ; wait for IC2 interupt flag (TTL CID signal) E06E LE06E: ldab TFLG1 E071 andb #0x02 E073 bne LE07C ; make sure IC2 status has not changed E075 ldd #0x0001 ; exit code E078 pulx E079 pulx E07A pulx E07B rts E07C LE07C: ldab #0x02 E07E stab TFLG1 ; clear IC2 interupt flag E081 ldab TCTL2 E084 andb #0xF3 ; clear IC2 edge setting E086 orab #0x08 ; capture falling edges on IC2 E088 stab TCTL2 E08B ldd TIC2 E08E tsx E08F std 0x00,x E091 subd L000B E094 std L0009 E097 subd #0x0212 E09A bhi LE0A4 E09C ldd L0009 E09F subd #0x0172 E0A2 bcc LE0AB E0A4 LE0A4: ldd #0x0020 ; exit code E0A7 pulx E0A8 pulx E0A9 pulx E0AA rts E0AB LE0AB: tsx E0AC ldd 0x00,x E0AE addd #0x0438 E0B1 std TOC1 E0B4 ldab #0x80 E0B6 stab TFLG1 ; clear OC1 interupt flag E0B9 LE0B9: ldab TFLG1 E0BC andb #0x80 E0BE bne LE0C7 ; check OC1 interupt status ( time out) E0C0 ldab TFLG1 E0C3 andb #0x02 E0C5 beq LE0B9 ; check IC2 status (CID signal) E0C7 LE0C7: ldab TFLG1 E0CA andb #0x02 E0CC bne LE0D5 ; check IC2 status E0CE ldd #0x0010 ; exit code E0D1 pulx E0D2 pulx E0D3 pulx E0D4 rts E0D5 LE0D5: ldd TIC2 E0D8 tsx E0D9 std 0x02,x E0DB subd 0x00,x E0DD std 0x04,x E0DF subd #0x0104 E0E2 bhi LE0F2 E0E4 ldd 0x04,x E0E6 subd #0x008C E0E9 bcs LE0F2 E0EB ldd #0x0002 ; exit code E0EE pulx E0EF pulx E0F0 pulx E0F1 rts E0F2 LE0F2: tsx E0F3 ldd 0x04,x E0F5 subd #0x0424 E0F8 bhi LE108 E0FA ldd 0x04,x E0FC subd #0x03AC E0FF bcs LE108 E101 ldd #0x0004 ; exit code E104 pulx E105 pulx E106 pulx E107 rts E108 LE108: ldd #0x0008 ; exit code E10B pulx E10C pulx E10D pulx E10E rts ; ; ; address must be in a function table ; E10F pshx E110 ldab #0x01 E112 ldaa L003B E115 beq LE11B E117 LE117: lslb E118 deca E119 bne LE117 E11B LE11B: tsx E11C stab 0x00,x E11E bra LE180 E120 LE120: ldx L0039 E123 ldab 0x00,x E125 tsx E126 andb 0x00,x E128 bne LE163 E12A ldab L003B E12D clra E12E pshb E12F psha E130 ldd L0039 E133 subd #0xB600 ; eeprom E136 lsld E137 lsld E138 lsld E139 tsx E13A addd 0x00,x E13C pulx E13D tsx E13E stab 0x01,x E140 ldaa #0x06 E142 mul E143 addd #0xEE89 E146 xgdx E147 ldd 0x00,x E149 std L0044 E14C tsx E14D ldab 0x01,x E14F ldaa #0x06 E151 mul E152 addd #0xEE8B E155 xgdx E156 ldd 0x00,x E158 std L0046 E15B inc L003B E15E ldd #0x00AA E161 pulx E162 rts E163 LE163: inc L003B E166 tsx E167 lsl 0x00,x E169 LE169: ldab L003B E16C cmpb #0x08 E16E bcs LE120 E170 ldab #0x01 E172 tsx E173 stab 0x00,x E175 clr L003B E178 inc L003A E17B bne LE180 E17D inc L0039 E180 LE180: ldd #0xB606 E183 subd L0039 E186 bhi LE169 E188 ldd #0x0055 E18B pulx E18C rts ; ; Timer 4 IRQ ; E18D LE18D: ldab #0x08 E18F stab TFLG1 ; OC5F (output compare 5 flag IRQ enable) E192 ldx #0x1021 ; TCTL2 E195 bclr 0x00,x,#0xC0 E198 ldx #0x1022 ; TMSK1 E19B bclr 0x00,x,#0x08 ; disable OC5 interupts E19E ldx #0x1003 ; PORTC E1A1 bclr 0x00,x,#0x02 E1A4 ldd TI4O5 E1A7 subd L000B E1AA std L0011 E1AD ldx #0x0002 E1B0 bset 0x00,x,#0x08 E1B3 rts E1B4 LE1B4: ldx #0x0002 E1B7 bset 0x00,x,#0x44 E1BA ldab #0x04 E1BC stab TFLG1 E1BF ldx #0x1021 ;TCTL2 E1C2 bclr 0x00,x,#0x30 E1C5 ldx #0x1022 ; TMSK1 E1C8 bclr 0x00,x,#0x04 ; disable IC1 interupts E1CB ldd TIC1 E1CE std L0013 E1D1 ldab PORTC E1D4 andb #0x60 E1D6 stab L00FF E1D9 cmpb #0x40 E1DB beq LE1E1 E1DD cmpb #0x20 E1DF bne LE1 E1E1 LE1E1: ldx L00F8 E1E4 bset 0x00,x,#0x08 E1E7 bra LE1F8 E1E9 LE1E9: ldab L00FF E1EC clra E1ED subd #0x0060 E1F0 bne LE1F8 E1F2 ldx L00F8 E1F5 bset 0x00,x,#0x04 E1F8 LE1F8: ldab L0010 ; injector number E1FB clra ; 0x00nn E1FC subd #0x0001 E1FF addd #0xEFD5 ; second fuel injector data table E202 xgdx ; x = 0xEFD5 + nn E203 ldab 0x00,x E205 cmpb #0x01 E207 bne LE211 E209 ldx L00F8 ; figure out what this variable is E20C bset 0x00,x,#0x01 ; this could be feeder flags? E20F bra LE217 E211 LE211: ldx L00F8 E214 bset 0x00,x,#0x02 ; this could be feeder flags E217 LE217: ldab PORTC E21A andb #0x80 E21C stab L00FE E21F tstb E220 bne LE228 E222 ldx #0x0003 E225 bset 0x00,x,#0x02 E228 LE228: rts ; ; interupt vector ; SWIRTN ; ILOPRT ; All null interupts ; E229 LE229: sei ; clear interupts E22A ldab #0xAB E22C stab OPTION ; Can be written only once in first 64 cycles out of reset in normal modes, or any time in special modes. E22F lds #0x01FF ; set stack pointer E232 ldab CONFIG E235 cmpb #0x0B E237 beq LE23F E239 ldd #0x0005 E23C jsr LD629 ; sub-routine (long) -- This is outside of the ROM addressing space E23F LE23F: ldaa #0xD0 E241 tap E242 ldab HPRIO E245 andb #0xF0 E247 orab #0x0A E249 stab HPRIO E24C ldx #0x102B ;baud E24F bset 0x00,x,#0x30 ; set baud rate prescaler (SCP1:0 = 9600) E252 ldab #0x1F E254 stab DDRC E257 ldab #0x38 E259 stab DDRD E25C clr PORTA E25F clr PORTB ; clear fuel injector enable bits E262 clr PORTD E265 ldab #0x02 E267 stab PORTC E26A ldab #0x13 E26C stab SPCR E26F ldab #0x87 E271 stab PACTL E274 clra E275 ldx #0x0000 E278 LE278: cpx #0x01FF E27B beq LE282 E27D staa 0x00,x E27F inx E280 bra LE278 E282 LE282: lds #0x01FF ; stack pointer = 0x01ff ?? E285 jsr LED98 ; sub-routine (long) E288 jsr LD857 ; sub-routine (long) E28B cmpb #0x01 E28D bne LE28F E28F LE28F: ldx #0x0002 E292 bclr 0x00,x,#0x10 E295 ldx #0x0001 E298 bclr 0x00,x,#0x01 E29B clr TCTL1 E29E clr TCTL2 E2A1 ldab #0xFF E2A3 stab TFLG1 E2A6 ldab #0xF0 E2A8 stab TFLG2 E2AB clr TMSK1 ; disable all hardware irq's E2AE clr TMSK2 ; disable all hardware irq's E2B1 LE2B1: jsr LD6F9 ; sub-routine (long) E2B4 ldab PORTA E2B7 andb #0x01 E2B9 bne LE2B1 E2BB ldx #0x1004 E2BE bset 0x00,x,#0x01 ; PORTB bit 0 (Fuel injector #1) E2C1 ldab #0x04 E2C3 stab TFLG1 E2C6 ldab TCTL2 E2C9 andb #0xCF E2CB orab #0x20 E2CD stab TCTL2 E2D0 ldx #0x1022 ; TMSK1 E2D3 bset 0x00,x,#0x04 ; enable IC1 interupt E2D6 ldab #0x10 E2D8 stab TFLG1 ; set OC4 interupt flag E2DB ldab TCTL1 E2DE andb #0xF3 E2E0 orab #0x08 E2E2 stab TCTL1 E2E5 ldab #0x10 E2E7 stab CFORRC ; force timer compare OC4 E2EA ldab #0x08 E2EC stab TFLG1 E2EF ldab TCTL2 E2F2 andb #0x3F E2F4 orab #0x40 E2F6 stab TCTL2 E2F9 ldx #0x1022 ; TMSK1 E2FC bset 0x00,x,#0x08 E2FF ldab #0x01 E301 stab TFLG1 E304 ldab TCTL2 E307 andb #0xFC E309 orab #0x01 E30B stab TCTL2 E30E ldx #0x1022 ;TMSK1 E311 bset 0x00,x,#0x01 E314 ldab #0x02 E316 stab TFLG1 E319 ldx #0x1021 ; TCTL2 E320 jsr LD9A7 ; sub-routinelong) E323 rts ; ; IRQ reset code passed ; with d ; ; IRQ's that require ; a reset use this ; E324 LE324: pshb E325 pshx E326 pshx E327 des ; dec stack pointer E328 tsx ; transfer stack pointer to x E329 ldab 0x05,x ; get variable #5 from stack E32B cmpb #0x10 E32D bhi LE332 ; if variable #5 > 10 goto to E332 E32F tstb E330 bne LE336 ; if variable = 0, goto E336 E332 LE332: pulx E333 pulx E334 pulx E335 rts E336 LE336: clr L0004 E339 clr PPROG E33C tsx ; transfer stack to x E33D ldab 0x05,x E33F clra E340 subd #0x0001 E343 ldx #0x0005 E346 jsr LF40F ; sub-routine (long) E349 addd #0xF139 ; address of data table E34C tsx E34D std 0x03,x E34F ldx 0x03,x E351 ldd 0x00,x E353 addd #0xB606 E356 tsx E357 std 0x01,x E359 ldx 0x01,x E35B ldab 0x00,x E35D comb E35E tsx E35F stab 0x00,x E361 ldx 0x03,x E363 andb 0x02,x E365 tsx E366 stab 0x00,x E368 ldx 0x03,x E36A ldab 0x04,x E36C tsx E36D cmpb 0x00,x E36F bls LE3BC E371 ldab 0x00,x E373 ldx 0x03,x E375 addb 0x03,x E377 tsx E378 stab 0x00,x E37A ldx 0x01,x E37C ldab 0x00,x E37E comb E37F stab L002F E382 tsx E383 ldx 0x03,x E385 ldab 0x02,x E387 comb E388 pshb E389 ldab L002F E38C tsx E38D andb 0x00,x E38F ins E390 stab L002F E393 tsx E394 orab 0x00,x E396 stab L002F E399 ldd 0x01,x E39B std L002D E39E jsr LF216 ; sub-routine (long) E3A1 cmpb #0x01 E3A3 bne LE3B5 E3A5 bra LE3B5 E3A7 LE3A7: ldab TFLG1 E3AA andb #0x80 E3AC beq LE3A7 E3AE jsr LF216 ; sub-routine (long) E3B1 cmpb #0x01 E3B3 bne LE3B5 E3B5 LE3B5: ldab L0004 E3B8 andb #0x03 E3BA bne LE3A7 E3BC LE3BC: tsx E3BD ldx 0x03,x E3BF ldab 0x04,x E3C1 tsx E3C2 cmpb 0x00,x E3C4 bne LE43E E3C6 ldx LEFA7 ; possible index E3C9 ldab 0x00,x ; b = 0xEF E3CB clra ; D = 0x00EF E3CC addd #0xB600 ; D = 0xB6EF (eeprom) E3CF std L002D E3D2 ldx L002D ; x = 0xB6EF E3D5 ldab 0x00,x ; fetch a byte from eeprom E3D7 comb ; invert byte E3D8 stab L002F E3DB ldx LEFA7 ; possible index, next byte E3DE orab 0x01,x ; 0x01,x = 0x53 E3E0 stab L002F E3E3 ldx L002D ; x = 0xB6EF E3E6 ldab 0x00,x ; fetch byte again E3E8 comb ; invert it E3E9 cmpb L002F ; compare to second stage cypher E3EC beq LE40C ; if eeprom byte passed cypher execute E3EE jsr LF216 ; sub-routine (long) E3F1 cmpb #0x01 E3F3 bne LE405 E3F5 bra LE405 E3F7 LE3F7: ldab TFLG1 E3FA andb #0x80 E3FC beq LE3F7 E3FE jsr LF216 ; sub-routine (long) E401 cmpb #0x01 E403 bne LE405 E405 LE405: ldab L0004 E408 andb #0x03 E40A bne LE3F7 ; ; eeprom cypher passed? ; E40C LE40C: ldd #0xB60A ; eeprom E40F std L002D E412 clr L002F E415 ldx L002D ; x = 0xB60A E418 ldab 0x00,x E41A comb E41B cmpb L002F E41E beq LE43E E420 jsr LF216 ; sub-routine (long) E423 cmpb #0x01 E425 bne LE437 E427 bra LE437 E429 LE429: ldab TFLG1 E42C andb #0x80 E42E beq LE429 E430 jsr LF216 ; sub-routine (long) E433 cmpb #0x01 E435 bne LE437 E437 LE437: ldab L0004 E43A andb #0x03 E43C bne LE429 E43E LE43E: pulx E43F pulx E440 pulx E441 rts ; ; Co-operative ; task switch or ; time delay function ; E442 LE442: pshb E443 pshx E444 pshx E445 pshx E446 des ; decrement stack pointer E447 tsx ; x = sp E448 ldab 0x07,x E44A cmpb #0x10 E44C bhi LE451 E44E tstb E44F bne LE456 E451 LE451: pulx E452 pulx E453 pulx E454 pulx E455 rts E456 LE456: tsx E457 ldab 0x07,x E459 clra E45A subd #0x0001 E45D ldx #0x0005 E460 jsr LF40F ; sub-routine (long) E463 addd #0xF139 ; address of data table E466 tsx E467 std 0x05,x E469 ldx 0x05,x E46B ldd 0x00,x E46D addd #0x001D E470 tsx E471 std 0x01,x E473 ldx 0x01,x E475 ldab 0x00,x E477 tsx E478 stab 0x00,x E47A ldx 0x05,x E47C andb 0x02,x E47E tsx E47F stab 0x00,x E481 ldx 0x05,x E483 ldab 0x04,x E485 tsx E486 cmpb 0x00,x E488 bls LE493 E48A ldab 0x00,x E48C ldx 0x05,x E48E addb 0x03,x E490 tsx E491 stab 0x00,x E493 LE493: tsx E494 ldx 0x05,x E496 ldab 0x02,x E498 comb E499 pshb E49A tsx E49B ldx 0x02,x E49D ldab 0x00,x E49F pshx E4A0 tsx E4A1 ldx 0x02,x E4A3 pshx E4A4 tsx E4A5 andb 0x00,x E4A7 ins E4A8 ins E4A9 pulx E4AA stab 0x00,x E4AC ins E4AD tsx E4AE ldx 0x01,x E4B0 ldab 0x00,x E4B2 pshx E4B3 tsx E4B4 orab 0x02,x E4B6 pulx E4B7 stab 0x00,x E4B9 tsx E4BA ldx 0x05,x E4BC ldab 0x04,x E4BE tsx E4BF cmpb 0x00,x E4C1 bne LE4E5 E4C3 ldx LEFA7 ; possible index E4C6 ldab 0x00,x E4C8 clra E4C9 addd #0x0017 E4CC tsx E4CD std 0x03,x E4CF ldx 0x03,x E4D1 ldab 0x00,x E4D3 pshx E4D4 ldx LEFA7 ; possible index E4D7 orab 0x01,x E4D9 pulx E4DA stab 0x00,x E4DC clr L0021 E4DF ldx #0x0002 E4E2 bclr 0x00,x,#0x10 E4E5 LE4E5: pulx E4E6 pulx E4E7 pulx E4E8 pulx E4E9 rts ; ; ; Jump table execution routine ; this may be a semiphore ; Timer 3 IRQ executes this ; L0007 controls function to execute ; E4EA LE4EA: ldab #0x20 E4EC stab TFLG1 ; clear OC3F IRQ (which is this irq) interupt must be enabled in TIMSK1 E4EF ldab L0007 ; get index from L007 E4F2 subb #0x04 E4F4 cmpb #0x05 ; make sure the index is not > 5 (only have 6 entrie) E4F6 bls LE4FB E4F8 jmp LE7DF ; rts ; ; jump into jump table ; b = index of routine ; 0 through 6 ; E4FB LE4FB: clra ; clear upper nibble of "double" E4FC lsld ; convert byte to word indexing E4FD addd #0xE505 ; address of function table E500 xgdx E501 ldx 0x00,x E503 jmp 0x00,x ; Undetermined Branch Address (table based) ; ; Function table ; E505 .byte 0xE5,0x11 ; function 0 .byte 0xE6,0xB1 ; function 1 .byte 0xE7,0x36 ; function 2 .byte 0xE7,0x99 ; function 3 .byte 0xE7,0xC9 ; function 4 .byte 0xE7,0x87 ; function 5 ; ; Function 0 ; ; This controls the ; the fuel injectors ; (near the end) ; E511 ldab L0002 E514 andb #0x20 E516 beq LE51B E518 jmp LE5AD E51B LE51B: ldab L0010 E51E cmpb #0x08 E520 bne LE598 E522 ldab #0x01 E524 stab L0010 E527 ldd L00F8 ; used by injector function in combination with data table E52A subd L00FC E52D bne LE553 E52F ldd #0x00F4 E532 subd L00F8 E535 bne LE545 E537 ldd #0x00B4 E53A std L00F6 E53D ldd #0x00F5 E540 std L00F8 E543 bra LE56F E545 LE545: ldd #0x0074 E548 std L00F6 E54B ldd #0x00F4 E54E std L00F8 E551 bra LE56F E553 LE553: ldd #0x00F4 E556 subd L00F8 E559 bne LE563 E55B ldd #0x0074 E55E std L00F6 E561 bra LE56F E563 LE563: ldd #0x00B4 E566 std L00F6 E569 ldd #0x00F5 E56C std L00F8 E56F LE56F: ldx L00F8 E572 clr 0x00,x E574 ldab L0002 E577 andb #0x10 E579 beq LE5AD E57B ldd L0027 E57E subd #0x3A98 E581 bcs LE58E E583 inc L0021 E586 ldx #0x0002 E589 bclr 0x00,x,#0x10 E58C bra LE5AD E58E LE58E: inc L0028 E591 bne LE596 E593 inc L0027 E596 LE596: bra LE5AD E598 LE598: inc L0010 E59B ldx L00F8 E59E ldab 0x00,x E5A0 andb #0x80 E5A2 bne LE5AD E5A4 ldd L00F6 E5A7 addd #0x0008 E5AA std L00F6 ; ; This section of the function ; controls the fuel injection ; E5AD LE5AD: ldab #0x10 E5AF stab TFLG1 ; clear OC4 interupt flag E5B2 ldab TCTL1 ; timer control E5B5 andb #0xF3 ; clear timer 4 settings E5B7 orab #0x08 ; clear OC4 to 0 E5B9 stab TCTL1 E5BC ldab #0x10 E5BE stab CFORRC ; force timer compare OC4 E5C1 ldx #0x1003 E5C4 bset 0x00,x,#0x02 ; set PORTC bit 2 E5C7 ldx #0x1000 E5CA bset 0x00,x,#0x20 ; set PORTA bit 5 Fuel delivery enable E5CD ldab L0010 ; fuel injector number to fire E5D0 clra E5D1 subd #0x0001 E5D4 addd #0xEFCD ; points to a table of binary bit fields (1,2,4,8,10...) E5D7 xgdx E5D8 ldab 0x00,x E5DA stab PORTB ; Fuel Injector Drivers E5DD ldab L0010 ; fuel injector number to fire E5E0 clra E5E1 subd #0x0001 E5E4 addd #0xEFD5 E5E7 xgdx E5E8 ldab 0x00,x E5EA andb #0x01 E5EC beq LE5F6 E5EE ldx #0x1003 E5F1 bclr 0x00,x,#0x18 ; clear PORTC bits 4,3 E5F4 bra LE5FC E5F6 LE5F6: ldx #0x1003 E5F9 bset 0x00,x,#0x18 ; set PORTC bits 4,3 E5FC LE5FC: clrb E5FD clra E5FE std L0011 ; d = 0 E601 ldx #0x0002 E604 bclr 0x00,x,#0xEC E607 clr L0003 E60A ldab #0x04 E60C stab TFLG1 ; clear IC1 interupt flag E60F ldab TCTL2 E612 andb #0xCF E614 orab #0x20 E616 stab TCTL2 ; edge1 = falling edges only E619 ldx #0x1022 E61C bset 0x00,x,#0x04 ; TMSK1 = enable IC1 interupts E61F ldab #0x08 E621 stab TFLG1 ; clear OC5 interupt flag E624 ldab TCTL2 E627 andb #0x3F E629 orab #0x40 E62B stab TCTL2 ; enable undefined bit 6 in TCTL2 ? E62E ldx #0x1022 E631 bset 0x00,x,#0x08 ; TMSK1 = enable OC5 interupts E634 ldab PORTA E637 andb #0x02 E639 stab L0000 ; temp variable for PORTA E63C tstb E63D beq LE650 E63F ldab #0x02 E641 stab TFLG1 ; clear IC2 interupt flag E644 ldab TCTL2 E647 andb #0xF3 E649 orab #0x08 E64B stab TCTL2 ; EDGE2 capture falling edges only E64E bra LE65F E650 LE650: ldab #0x02 E652 stab TFLG1 ; clear IC2 interupt flag E655 ldab TCTL2 E658 andb #0xF3 E65A orab #0x04 E65C stab TCTL2 ; edge2 capture rising edges only E65F LE65F: ldab #0x01 E661 stab TFLG1 ; clear IC3 interupt flag E664 ldab TCTL2 E667 andb #0xFC E669 orab #0x01 E66B stab TCTL2 ; edge3 capture rising edges only E66E ldx #0x1022 E671 bset 0x00,x,#0x01 ; TMSK1 = enable IC3 interupts E674 ldab PORTA E677 andb #0x01 E679 bne LE683 ; check CID signal, if logical 1 branch to E683 ; ; CID signal logical 0 ; E67B ldx #0x1003 E67E bset 0x00,x,#0x04 ; set PORTC bit 2 (combinational feeder enable) E681 bra LE689 E683 LE683: ldx #0x0002 E686 bclr 0x00,x,#0x01 ; set PORTC bit 2 (combination feeder enable) E689 LE689: ldab #0x20 E68B stab TFLG1 ; clear OC3 interupt flag E68E ldx #0x1022 E691 bclr 0x00,x,#0x20 ; TMSK1 = enable OC3 interupts E694 ldab #0x09 E696 stab L0007 E699 ldx #0x1009 E69C bset 0x00,x,#0x20 ; DDRD bit 5 = output mode E69F ldx #0x1008 E6A2 bset 0x00,x,#0x20 ; PORTD bit 5 (Digital Potentiometer / RST) E6A5 jsr LF2E5 ; ADC subsystem E6A8 ldx #0x1008 E6AB bclr 0x00,x,#0x20 ; PORTD bit 5 (Digital Potentiometer /RST) E6AE jmp LE7DF ; rts ; ; Function 1 ; E6B1 clr ADCTL E6B4 ldab L00FE E6B7 andb #0x80 E6B9 bne LE6C1 E6BB ldx #0x0003 E6BE bset 0x00,x,#0x04 E6C1 LE6C1: ldab L00FF E6C4 andb #0x20 E6C6 bne LE6CE E6C8 ldx #0x0003 E6CB bset 0x00,x,#0x08 E6CE LE6CE: ldab L00FF E6D1 andb #0x40 E6D3 bne LE6DB E6D5 ldx #0x0003 E6D8 bset 0x00,x,#0x10 E6DB LE6DB: ldab L0000 ; temp variable for PORTA values E6DE beq LE6E6 E6E0 ldx #0x0003 E6E3 bset 0x00,x,#0x01 E6E6 LE6E6: ldd L000D E6E9 subd L000B E6EC subd #0x0708 E6EF bls LE6F7 E6F1 ldx #0x0003 E6F4 bset 0x00,x,#0x20 E6F7 LE6F7: ldab L0002 E6FA ldx L00F6 E6FD stab 0x00,x E6FF ldab L0003 E702 ldx L00F6 E705 stab 0x01,x E707 ldd L0011 E70A ldx L00F6 ; ; i am not sure this is the real reset ; ; if it is, there may be hardware semiphore ; repsonsible for executing tasks ; E70D RESET: std 0x02,x ; assuming registers are cleared on reset, 0x02 = 0x0000 E70F ldd L0013 E712 subd L000B E715 ldx L00F6 E718 std 0x04,x E71A ldab #0x20 E71C stab TFLG1 ; clear OC3 interupt flag E71F ldab #0x04 E721 stab L0007 ; parameters to semiphore = 4 E724 ldd L000D E727 addd #0x04B0 E72A std TOC3 ; when TOC3 = true, hardware sempiphore executes index = L0007 E72D ldx #0x1022 ; TMSK1 E730 bset 0x00,x,#0x20 ; enable OC3 interupts E733 jmp LE7DF ; rts ; ; Function 2 ; E736 ldx #0x1003 E739 bclr 0x00,x,#0x04 ; clear PORTC bit 2 disable feeders E73C ldx #0x1000 E73F bclr 0x00,x,#0x20 ; clear PORTA bit 5 Fuel delivery enable E742 ldx #0x0002 E745 bset 0x00,x,#0x84 E748 ldab #0x20 E74A stab TFLG1 ; clear OC3 interupt flag E74D ldx #0x1022 ; TMSK1 E750 bclr 0x00,x,#0x20 ; clear OC3 interupt enable E753 ldab #0x09 E755 stab L0007 ; parameter to semiphore = 9 E758 ldab PORTC E75B andb #0x60 E75D stab L00FF E760 cmpb #0x40 E762 beq LE768 E764 cmpb #0x20 E766 bne LE770 E768 LE768: ldx L00F8 E76B bset 0x00,x,#0x08 E76E bra LE77D E770 LE770: ldab L00FF E773 cmpb #0x60 E775 bne LE77D E777 ldx L00F8 E77A bset 0x00,x,#0x04 E77D LE77D: ldab PORTC E780 andb #0x80 E782 stab L00FE E785 bra LE7DF ; rts ; ; Function 3 ; E787 ldab #0x20 E789 stab TFLG1 ; clear OC3 interupt flag E78C ldx #0x1022 ; TMSK1 E78F bclr 0x00,x,#0x20 ; clear OC3 interupt enable E792 ldab #0x09 E794 stab L0007 ; parameter to semiphore = 9 E797 bra LE7DF ; rts ; ; Function 4 ; E799 ldab #0x01 E79B stab TFLG1 ; clear IC3 interupt flag E79E ldab TCTL2 ; Get input capture edge setting E7A1 andb #0xFC ; clear edge 3 settings E7A3 orab #0x01 ; IC3 = rising edge only E7A5 stab TCTL2 E7A8 ldx #0x1022 ; TMSK1 E7AB bset 0x00,x,#0x01 ; enable IC3 interupts E7AE ldab #0x20 E7B0 stab TFLG1 ; clear OC3 interupt flag E7B3 ldab #0x08 E7B5 stab L0007 ; parameters to semiphore = 8 E7B8 ldd L000B E7BB addd #0x32C8 E7BE std TOC3 E7C1 ldx #0x1022 ; TMSK1 E7C4 bset 0x00,x,#0x20 ; enable OC3 interupts E7C7 bra LE7DF ; rts ; ; Function 5 ; E7C9 ldx #0x0001 E7CC bclr 0x00,x,#0x02 E7CF ldab #0x20 E7D1 stab TFLG1 ; clear OC3 interupt flag E7D4 ldx #0x1022 ;TMSK1 E7D7 bclr 0x00,x,#0x20 ; disable OC3 interupt enable E7DA ldab #0x09 E7DC stab L0007 ; parameters to sempiphore = 9 E7DF LE7DF: rts ; return from subroutine ; ; Clock monitor fail IRQ ; ; this is a reset condition ; E7E0 CMONRT: sei E7E1 ldab #0xAB E7E3 stab OPTION E7E6 ldab #0x01 E7E8 stab INIT ; RAM I/O mapping = default E7EB ldx #0x1024 ; TIMSK2 E7EE bclr 0x00,x,#0x03 E7F1 ldab #0x1E E7F3 stab BPROT ; block protect register E7F6 lds #0x01FF ; set stack pointer E7F9 ldab CONFIG E7FC cmpb #0x0B ; no security, Rom On, eeprom enabled E7FE beq LE807 ; default IDM hardware into a safe state E800 nop ; this is probably debug code for external addressing E801 ldd #0x0005 E804 jsr LD629 ; this should not execute in single chip mode E807 LE807: ldaa #0xD0 E809 tap ; transfer A to CC register E80A ldab HPRIO ; highest priority interupt E80D andb #0xF0 E80F orab #0x0A ; set timer input capture 3 as highest interupt E811 stab HPRIO E814 ldx #0x102B E817 bset 0x00,x,#0x30 ; BAUD, = 9600 E81A ldab #0x40 E81C stab PORTA E81F ldab #0x1F E821 stab DDRC E824 ldab #0x38 E826 stab DDRD E829 clr PORTB ; Fuel Injector Drivers E82C clr PORTD E82F ldab #0x02 E831 stab PORTC E834 ldab #0x13 E836 stab SPCR ; 0x13 = IRQ disabled, SPI off, normal cmos outputs,Master mode, 62.5 khz clock E839 ldab #0x87 E83B stab PACTL E83E jmp LF37F ; SRAM test ? ; ; debug code? ; if carry set this will attempt ; to execute address D629 ; this should not execute ; while in single chip mode? ; E841 LE841: bcc LE849 E843 ldd #0x0001 ; probably debug code for external memory mode E846 jsr LD629 ; sub-routine (long) -- This is outside of the ROM addressing space E849 LE849: lds #0x01FF ; set stack pointer to 0x1ff, only have 0xff stack --?? E84C jsr LEE1E ; sub-routine (long) E84F cmpb #0x01 E851 bne LE85A E853 nop E854 ldd #0x0002 ; probably debug code for external memory mode E857 jsr LD629 ; sub-routine (long) -- This is outside of the ROM addressing space E85A LE85A: jsr LED98 ; sub-routine (long) E85D jsr LD857 ; sub-routine (long) E860 cmpb #0x01 E862 bne LE864 E864 LE864: clr L0008 E867 clr ADCTL E86A ldd #0x0030 E86D jsr LF184 ; sub-routine (long) E870 cmpb #0x01 E872 bne LE87A E874 ldx #0x0008 E877 bset 0x00,x,#0x01 E87A LE87A: ldab #0x04 E87C stab ADCTL E87F ldd #0x0034 E882 jsr LF184 ; sub-routine (long) E885 cmpb #0x01 E887 bne LE88F E889 ldx #0x0008 E88C bset 0x00,x,#0x04 E88F LE88F: ldab #0x05 E891 stab ADCTL E894 ldd #0x0035 E897 jsr LF184 ; sub-routine (long) E89A cmpb #0x01 E89C bne LE8A1 E89E clr L0035 E8A1 LE8A1: ldab #0x07 E8A3 stab ADCTL E8A6 ldd #0x0036 E8A9 jsr LF184 ; sub-routine (long) E8AC cmpb #0x01 E8AE bne LE8B6 E8B0 ldx #0x0008 E8B3 bset 0x00,x,#0x02 E8B6 LE8B6: jsr LD040 ; sub-routine (long) E8B9 ldab L0021 E8BC cmpb #0x28 E8BE bcs LE8D3 E8C0 jsr LD927 ; sub-routine (long) E8C3 cmpb #0x01 E8C5 bne LE8CD E8C7 ldd #0x0004 E8CA jsr LE442 ; sub-routine (long) E8CD LE8CD: ldx #0x0002 E8D0 bclr 0x00,x,#0x10 E8D3 LE8D3: jsr LD6F9 ; sub-routine (long) E8D6 ldab PORTA E8D9 andb #0x01 E8DB bne LE8D3 E8DD ldx #0x1004 E8E0 bset 0x00,x,#0x01 ; PORTB bit 0 (Fuel Injector #1) E8E3 clr TCTL1 E8E6 clr TCTL2 E8E9 ldab #0xFF E8EB stab TFLG1 E8EE ldab #0xF0 E8F0 stab TFLG2 E8F3 clr TMSK1 E8F6 clr TMSK2 E8F9 ldab #0x04 E8FB stab TFLG1 E8FE ldab TCTL2 E901 andb #0xCF E903 orab #0x20 E905 stab TCTL2 E908 ldx #0x1022 ; TMSK1 E90B bset 0x00,x,#0x04 E90E ldab #0x10 E910 stab TFLG1 E913 ldab TCTL1 E916 andb #0xF3 E918 orab #0x08 E91A stab TCTL1 E91D ldab #0x10 E91F stab CFORRC ; force timer compare OC4 E922 ldab #0x08 E924 stab TFLG1 E927 ldab TCTL2 E92A andb #0x3F E92C orab #0x40 E92E stab TCTL2 E931 ldx #0x1022 ; TMSK1 E934 bset 0x00,x,#0x08 E937 ldab #0x01 E939 stab TFLG1 E93C ldab TCTL2 E93F andb #0xFC E941 orab #0x01 E943 stab TCTL2 E946 ldx #0x1022 ; TMSK1 E949 bset 0x00,x,#0x01 E94C ldab #0x02 E94E stab TFLG1 E951 ldx #0x1021 ; TCTL2 E954 bset 0x00,x,#0x0C E957 cli E958 ldx #0x1000 E95B bclr 0x00,x,#0x40 ; PORTA bit 6 (TTL idm feed back) E95E ldab #0x01 E960 stab L0006 E963 ldx #0x1020 ; TCTL1 E966 bset 0x00,x,#0xC0 E969 ldd TCNT E96C addd #0x3E80 E96F std TOC2 E972 ldx #0x1022 ; TMSK1 E975 bset 0x00,x,#0x40 E978 jsr LD9A7 ; sub-routine (long) direct address is outside of addressing space E97B rts ; ; TI3RTN IRQ Handler ; (Timer Interupt 3) ; E97C LE97C: ldab #0x01 E97E stab TFLG1 ;IC3F (input capture 3 flag interupt enable) E981 ldab TCTL2 E984 andb #0x01 E986 bne LE98B E988 jmp LEC06 E98B LE98B: ldd TIC3 E98E std L000B E991 ldab PORTA E994 andb #0x02 E996 stab L0000 ; L0000 is a temp variable for PORTA data E999 ldab PORTC E99C stab L00FF E99F ldab PORTA E9A2 andb #0x01 E9A4 bne LE9A9 E9A6 jmp LEBDE E9A9 LE9A9: ldab L0001 E9AC andb #0x01 E9AE beq LE9BB E9B0 jsr LDC71 ; sub-routine (long) E9B3 ldab L0001 E9B6 andb #0x01 E9B8 beq LE9BB E9BA rts E9BB LE9BB: ldab #0x20 E9BD stab TFLG1 E9C0 ldx #0x1022 E9C3 bclr 0x00,x,#0x20 ; TMSK1 E9C6 ldab #0x09 E9C8 stab L0007 E9CB ldab #0x10 E9CD stab TFLG1 E9D0 ldx #0x1020 E9D3 bset 0x00,x,#0x0C ; TCTL1 E9D6 ldd L000B E9D9 addd #0x0708 E9DC std TOC4 E9DF ldab #0x01 E9E1 stab TFLG1 E9E4 ldab TCTL2 E9E7 andb #0xFC E9E9 orab #0x02 E9EB stab TCTL2 E9EE ldx #0x1022 E9F1 bset 0x00,x,#0x01 ; TMSK1 E9F4 ldab L0002 E9F7 andb #0x01 E9F9 bne LEA0D E9FB ldx #0x1003 E9FE bclr 0x00,x,#0x04 ; PORTC bit 2 EA01 ldx #0x1000 EA04 bclr 0x00,x,#0x20 ; PORTA bit 5 EA07 ldx L00F8 EA0A bset 0x00,x,#0x40 EA0D LEA0D: ldab TFLG1 EA10 andb #0x02 EA12 bne LEA17 EA14 jmp LEB55 EA17 LEA17: ldd L000B EA1A subd TIC2 EA1D std L0009 EA20 subd #0x00F0 EA23 bls LEA28 EA25 jmp LEB30 EA28 LEA28: ldd L0009 EA2B subd #0x0050 EA2E bcc LEA33 EA30 jmp LEB30 EA33 LEA33: ldx #0x0002 EA36 bset 0x00,x,#0x01 EA39 ldab L0006 EA3C cmpb #0x03 EA3E beq LEA5F EA40 ldx #0x1022 ; TMSK1 EA43 bclr 0x00,x,#0x40 EA46 ldab #0x40 EA48 stab TFLG1 EA4B ldab #0x03 EA4D stab L0006 EA50 ldab TCTL1